A new improved accuracy CMOS Gaussian function generator will be presented. The original sixth-order approximation function that represents the basis for designing the proposed Gaussian circuit allows a large increase in the circuit accuracy and also of the input variable maximal range. The original proposed computational structure has a large dynamic output range of 27 dB, for a variation smaller than 1 dB as compared with the ideal Gaussian function. The circuit is simulated for 0.18 m CMOS technology and has a low supply voltage (VDD = 0.7 V). Its power consumption is smaller than 0.22 W, for VDD = 0.7 V, while the chip area is about 7 m2. The new proposed architecture is re-configurable, the convenient modification of the coefficients allowing to obtain many mathematical functions using the same computational structure.
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